Visual Odometry for Pixel Processor Arrays

We present an approach of estimating constrained ego-motion on a Pixel Processor Array (PPA). These devices embed processing and data storage capability into the pix-els of the image sensor, allowing for fast and low power parallel computation directly on the image-plane. Rather than the standard visual pipeline whereby whole images are transferred to an external general processing unit, our ap-proach performs all computation upon the PPA itself, with the camera's estimated motion as the only information out-put. Our approach estimates 3D rotation and a 1D scale-less estimate of translation. We introduce methods of im-age scaling, rotation and alignment which are performed solely upon the PPA itself and form the basis for conduct-ing motion estimation. We demonstrate the algorithms on a SCAMP-5 vision chip, achieving frame rates >1000Hz at ∼2W power consumption.