ZUCL 2.0: Virtualised Memory and Communication for ZYNQ UltraScale+ FPGAs

Khoa Pham, Kyriakos Paraskevas, Anuj Vaishnav, Andrew Attwood, Malte Vesper, Dirk Koch

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper introduces ZUCL 2.0, which extends abstraction services for FPGA applications on ARM-FPGA hybrids. The ZUCL 2.0 management services include 1) FPGA multi-tasking and context-switching based on dynamic reconfiguration and cooperative scheduling, 2) communication abstraction based on the ARM AMBA standard, and 3) memory isolation for privacy and security purposes. Moreover, FPGA applications deployed on ZUCL 2.0 and the ZUCL 2.0 kernel itself can be built and maintained independently. This is a crucial feature for higher design productivity and more flexible system updates. Prototypes were implemented for latest Xilinx UltraScale+ ZCU102, UltraZed and Ultra96 platforms to demonstrate the capabilities of ZUCL 2.0.
Original languageEnglish
Title of host publicationFSP Workshop 2019; Sixth International Workshop on FPGAs for Software Programmers
PublisherVDE Verlag
ISBN (Print)978-3-8007-5045-0
Publication statusPublished - 2019

Fingerprint

Dive into the research topics of 'ZUCL 2.0: Virtualised Memory and Communication for ZYNQ UltraScale+ FPGAs'. Together they form a unique fingerprint.

Cite this