INVESTIGATING REMOTE DYNAMIC POWER ATTACKS FOR SECURING FPGA SYSTEMS

Student thesis: Doctor of Engineering

Abstract

As FPGAs are now offered on the cloud, this exposes many potential security issues. This project investigates current security issues and challenges when deploying FPGAs in the cloud as well as using FPGAs in a multi-tenancy scenario. An in-depth investigation of recent FPGA architectures has been carried out to study the possibility to create and customise malicious circuits to exploit power side-channel and denial-of-service attacks on FPGAs. This thesis identified that self-toggling circuits such as ring-oscillators and glitch amplifiers not only pose a threat to the confidentiality but also to the reliability of an FPGA system. On the one hand, ring-oscillators could be used to sense electrical activities due to their sensitivity to voltage fluctuation. On the other hand, when the self-toggling circuit is tuned, it could draw excessive power to effectively overwhelm the power supply circuit of a system in case of a denial-of-service attack. Therefore, it is of paramount importance to assess the power attack potential of a design as early as possible. With the detailed information studied, we could accurately detect malicious sources at a very early stage before the design is programmed onto the FPGA board. Moreover, this thesis provides a characterisation of waste power potential on modern data centre FPGAs to assist in analysing the level of power attack threat which could also come from the abuse of power-hungry circuits such as cryptographic algorithm calculation.
Date of Award31 Dec 2023
Original languageEnglish
Awarding Institution
  • The University of Manchester
SupervisorJames Garside (Supervisor) & Dirk Koch (Supervisor)

Keywords

  • FPGA Defender
  • Denial-of-Service
  • Remote attacks
  • DoS
  • Power hammering
  • FPGA
  • Side-channel

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