Simulation and Fabrication of Schottky Diodes and FETs based on IGZO Metal-Oxide Semiconductor

Abstract

Abstract Research on metal-oxide semiconductors, such as zinc oxide (ZnO) and indium gallium zinc oxide (IGZO), has grown very rapidly over the last decade. Many metal-oxide semiconductors have advantageous properties over their silicon counterparts (particularly amorphous silicon thin film), including high carrier mobility, low cost, low-temperature deposition or growth, transparency, and mechanical flexibility, in addition to being environmentally friendly. Metal-oxide semiconductors can be used in a range of applications in which silicon would be either too expensive or could not be used (i.e. on flexible plastic substrates). To date, most research has concentrated on the optimisation of metal-oxide semiconductor materials and thin-film transistors (TFTs), and only a limited number of studies have been carried out on diodes, despite the fact that they are the basic building blocks of many electronic circuits. This dissertation details research carried out with Schottky diodes and transistors based on metal-oxide semiconductors. The fabricated diodes have different layers of varying thicknesses: a first layer of platinum on glass substrate, a second layer of IGZO, and a third layer of aluminium. This research has found that different results are obtained when the first layer is etched as opposed to non-etched. The measurements included current-voltage (I-V) and capacitor-voltage (C-V) characteristics have been conducted. The ideality factor, barrier height, affinity factor and series resistance have all been extracted from the analysis of I-V characteristics. Using the C-V method, it was also possible to determine built-in voltage and depletion layer thickness. In addition, different temperature and thermal annealing conditions have been used to identify the dependences of those parameters. Radio frequency (RF) measurements were taken. These showed the Schottky diode response reached approximately 100 KHz cut-off frequency and the analysis revealed that large device capacitance had limited the speed. Future work to reduce the device area and hence its capacitance should lead to a much higher operating speed. Finally, a MOSFET three terminal devices was fabricated and measured, in view of making logic gates. The data from the MOSFET was used in simulation software to assess the suitability from making logic gates. Furthermore MESFETs instead of MOSFETs were considered and demonstrated numerically for making a NAND gate.  

Date of Award	31 Dec 2018
Original language	English
Awarding Institution	The University of Manchester
Supervisor	Zhirun Hu (Supervisor)